1. Field of the Invention
The present invention relates generally to the design of integrated circuits (ICs) and more particularly to methods for generating and verifying isolation logic in the design of ICs.
2. Description of the Related Art
Complex electronic systems are typically designed using integrated circuits (ICs) comprising multiple functional blocks. An IC may have a wide range of power supply conditions, a number of independent power domains, and circuit performance objectives. Generally, different power domains are established between digital, analog and radio frequency (RF) functional blocks on an IC. As an example, a wireless handset chip has several power domains due to multiple modes of operation.
Referring to FIG. 1, an exemplary circuit 100 including two power domains 110 and 120 is shown. The power domains 110 and 120 are logic units serving different functions. Power domains 110 and 120 are powered by signals VC1 and VC2 supplied by a level shifter 130, which translates power signals between two voltage domains. For example, level shifter 130 may translate signals originating from a first domain operating under a lower supply voltage (e.g., 1.2V) to a second domain operating with a higher supply voltage (e.g., 2.5V). However, it should be noted that power domains do not have to be connected to a level shifter.
For power management purposes and reducing power consumption, parts of a design are usually turned off during the operation of a semiconductor device. Specifically, power domains that power IC areas not actively used in certain modes of operation are completely shut down. A correct design requires that when a power domain is shut down, its output signals will not become indeterminable so that an unknown state is transferred to the rest of the design.
Moreover, leakage power is a critical concern for design of ICs that operate in stand-by mode and are manufactured using advanced fabrication technologies, such as 90 nm and below. Turning off a supply to the regions of design in such modes of operation eliminates leakage power consumption associated with these regions completely. For isolating and enforcing stable output values at shutdown, the outputs of power domains 110 and 120 are connected to isolation logic modules 140 and 150 respectively. Isolation logic modules 140 and 150 ensure that power domains 110 and 120 are correctly isolated and none of their outputs is left indeterminable, and are therefore determinable, when the power is off. The design of isolation logic demands a designer to determine a set of shutdown constraints including steady state output values, shutdown conditions, wakeup/shutdown signals, and so on.
Prior art design tools, e.g., computer aided design (CAD) do not provide automated means for isolating power domain in the design, i.e., generating and inserting isolation logic modules in the design. Moreover, such tools generally require that the user identify all power domains in the design, define an isolation logic for each domain and check its correctness. In ICs where the number of power domains may be large, this is an inefficient, time-consuming, as well as an error prone task.
It would be, therefore, advantageous to provide a solution that automatically generates isolation logic modules for power domains and appropriately places these modules in the design. It would be further advantageous if the provided solution automatically detects isolation logic modules within the design and checks their correctness.